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Re: PAL's and GAL's

Subject: Re: PAL's and GAL's
From: Jonathan Kirwan
Date: Thu, 30 Mar 2006 18:12:46 GMT
Newsgroups: sci.electronics.basics, comp.arch.embedded, sci.electronics.design
On 29 Mar 2006 22:02:06 -0800, "jozamm@xxxxxxxxx" <jozamm@xxxxxxxxx>
wrote:

><snip>
>What software is available to enter the logic equations and compile to
>the fuse file? Does any schematic entry software exist which one can
>enter the schemtic and compule to the fuse map?
><snip>

I've looked over the responses and do not yet see a direct answer to
the question of allowing a schematic entry of logic leading to a fuse
map output, with a free tool.

I would guess that if you could find a package that supports schematic
entry (such as perhaps Altium Designer) and also supports GALs and
PALs (don't know about Altium on this score), that you'd get there.
But that's _very_ expensive to consider.  What else might there be?
Seems simple enough to do after the schematic entry graphical part of
it is done -- and that itself can be kept relatively simple.

An idea -- not sure if it would help.  But it would be possible to use
Linear Tech's LTSpice (SWCADIII) to do the schematic entry part of the
job.  It's free to anyone.  It isn't difficult to create the symbols
that would be used for teaching and the schematic is saved in ASCII
form.  I've already written the software to parse that ASCII source
into an internal form that may be usable for generating the logic
equations which could then be input to CUPL, I suppose.  Would this
fit the need?

Jon

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