In article <JoA2f.4359$g65.3205@xxxxxxxxxxxxxxxxxxxxx>,
Ignoramus14838 <ignoramus14838@xxxxxxxxxxxxxxxxxxxx> wrote:
>Another question, would a resistor between gate and emitter solve ths
>issue? Or is that not the case?
I think you may be thinking about IGBTs wrongly. Think of it as being
ASCII ART: Collector pin
! ! ! ! !
--- --- ! ! !
---Cr1 Cr2 --- (I1) --- !
! ! ! --- !
! ! ! ! !/ e
! ! +-----+--! PNP
! ! ! ! !\ c Q2
! Rgg' Lgg' ! !!- d --- !
Gate pin ---+/\/\/-)))))--+----+---!! --- !
! Q1 !!-------+-+--
--- s !
! Cg !
-------------------+-- Emittor pine
To turn it on, you have to get a charge through Rgg' and Lgg' onto the Cg
so it charges up to enough voltage to bias Q1 on. When it starts to turn
on, the gate drive circuit also has to provide the charge for Cr1 and Cr2.
Cr2 is really not linear. Its capacitance increases as the voltage on the
"collector" decreases. You can sort of ignore this for your initial
thinking but you've got to worry about it in the real circuit.
To turn the thing off, you have to get the charge out of Cg so that the
gate voltage on Q1 goes low. To do this you have to pull down on the gate
pin. You driver circuit, once again, also has to handle the charging of
Cr1 and Cr2.
Once you start turning Q1 off, the capacitors I drew in near Q2 come into
play. It is really (I1) that turns off Q2. Once Q1 is turned off, the
carriers "trapped" in the base of Q2 slwly get eaten up and the device
I think it should now be clear haw pulling the gate below ground helps.
It increases the current through the Rgg' and thus gets the MOSFET off
sooner. It also prevents the Cr2 from turning the Q1 back on when Q2
starts to turn off and the "collector" voltage starts to increase.
There is also an unwanted NPN structure in the IGBT. This can cause
trouble if it gets enough forward bias. Hopefully, you are staying way
from such conditions.
kensmith@xxxxxxxxx forging knowledge