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Micro-loops: asym condition

Subject: Micro-loops: asym condition
From: Alex Zinin
Date: Thu, 14 Jul 2005 12:39:08 -0700
 Mike's simulations have shown that though applying the stricter
 loop-freeness condition in asymmetric-cost topologies prevents multi-hop
 loops, it reduces general coverage and hence leads to more type-C chains
 that results in more 2-hop loops.

 I suggest that we remove the asymmetric condition from the document and
 always use the original (symmetric) one.


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