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Also zero pci_irq_levels on reset to avoid stuck irq after reset.
Signed-off-by: Gleb Natapov <gleb@xxxxxxxxxx>
Signed-off-by: Yaniv Kamay <ykamay@xxxxxxxxxx>
---
hw/piix_pci.c | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 914a65a..ff2cbde 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -232,8 +232,9 @@ static void piix3_set_irq(qemu_irq *pic, int irq_num, int
level)
}
}
-static void piix3_reset(PCIDevice *d)
+static void piix3_reset(void *opaque)
{
+ PCIDevice *d = opaque;
uint8_t *pci_conf = d->config;
pci_conf[0x04] = 0x07; // master, memory and I/O
@@ -267,6 +268,8 @@ static void piix3_reset(PCIDevice *d)
pci_conf[0xab] = 0x00;
pci_conf[0xac] = 0x00;
pci_conf[0xae] = 0x00;
+
+ memset(pci_irq_levels, 0, sizeof(pci_irq_levels));
}
static void piix4_reset(PCIDevice *d)
@@ -339,6 +342,7 @@ int piix3_init(PCIBus *bus, int devfn)
PCI_HEADER_TYPE_NORMAL | PCI_HEADER_TYPE_MULTI_FUNCTION; //
header_type = PCI_multifunction, generic
piix3_reset(d);
+ qemu_register_reset(piix3_reset, 0, d);
return d->devfn;
}
--
1.6.2.1
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