qemu-devel@nongnu.org
[Top] [All Lists]

[Qemu-devel] [5595] target-ppc: fix srw on 64-bit targets

Subject: [Qemu-devel] [5595] target-ppc: fix srw on 64-bit targets
From: Aurelien Jarno
Date: Sun, 02 Nov 2008 08:22:18 +0000
Revision: 5595
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5595
Author:   aurel32
Date:     2008-11-02 08:22:16 +0000 (Sun, 02 Nov 2008)

Log Message:
-----------
target-ppc: fix srw on 64-bit targets

Signed-off-by: Aurelien Jarno <aurelien@xxxxxxxxxxx>

Modified Paths:
--------------
    trunk/target-ppc/translate.c

Modified: trunk/target-ppc/translate.c
===================================================================
--- trunk/target-ppc/translate.c        2008-11-01 14:50:20 UTC (rev 5594)
+++ trunk/target-ppc/translate.c        2008-11-02 08:22:16 UTC (rev 5595)
@@ -2012,7 +2012,7 @@
 /* srw & srw. */
 GEN_HANDLER(srw, 0x1F, 0x18, 0x10, 0x00000000, PPC_INTEGER)
 {
-    TCGv temp;
+    TCGv temp, temp2;
     int l1, l2;
     l1 = gen_new_label();
     l2 = gen_new_label();
@@ -2024,8 +2024,10 @@
     tcg_gen_br(l2);
     gen_set_label(l1);
     tcg_gen_andi_tl(temp, cpu_gpr[rB(ctx->opcode)], 0x3f);
-    tcg_gen_shr_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rS(ctx->opcode)], temp);
-    tcg_gen_ext32u_tl(cpu_gpr[rA(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
+    temp2 = tcg_temp_new(TCG_TYPE_TL);
+    tcg_gen_ext32u_tl(temp2, cpu_gpr[rS(ctx->opcode)]);
+    tcg_gen_shr_tl(cpu_gpr[rA(ctx->opcode)], temp2, temp);
+    tcg_temp_free(temp2);
     gen_set_label(l2);
     tcg_temp_free(temp);
     if (unlikely(Rc(ctx->opcode) != 0))




<Prev in Thread] Current Thread [Next in Thread>
  • [Qemu-devel] [5595] target-ppc: fix srw on 64-bit targets, Aurelien Jarno <=