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Re: kern/40586: rgephy(4) now selects incorrect speed for some re(4)

Subject: Re: kern/40586: rgephy4) now selects incorrect speed for some re(4
From: Christoph Egger
Date: Mon, 09 Feb 2009 23:36:31 UTC
Newsgroups: fa.netbsd.bugs

Geoff Wing wrote:
> The following reply was made to PR kern/40586; it has been noted by GNATS.
> 
> From: Geoff Wing <gcw@xxxxxxxxx>
> To: gnats-bugs@xxxxxxxxxx
> Cc: 
> Subject: Re: kern/40586: rgephy(4) now selects incorrect speed for some
>       re(4)
> Date: Tue, 10 Feb 2009 09:53:24 +1100
> 
>  On Monday 2009-02-09 22:05 +0000, Christoph Egger output:
>  : I'm using rgephy(4) on nfe(4) and I can't reproduce
>  : the problem. Maybe rgephy.c triggers a bug in re(4) now ?
>  : 
>  : Christoph
>  
>  It only applies to some chips.  The hack I'm using (see below)
>  reintroduces some of the previous version which initialised the
>  chip differently.  The rgephy_load_dspcode() path doesn't do
>  the same PHY_WRITE()s.
>  
>  Regards,
>  Geoff
>  
>  --- rgephy.c.orig    2009-02-09 10:45:34.000000000 +1100
>  +++ rgephy.c 2009-01-20 12:33:49.000000000 +1100
>  @@ -593,17 +593,20 @@
>       struct rgephy_softc *rsc;
>       uint16_t ssr;
>   
>  +    mii_phy_reset(sc);
>  +    DELAY(1000);
>  +
>       rsc = (struct rgephy_softc *)sc;
>  -    if (rsc->mii_revision == 3) {
>  +    if (rsc->mii_revision < 2) {
>  +            rgephy_load_dspcode(sc);

rgephy_load_dspcode() already does this revision check.
You can safely call it unconditionally.

>  +    } else if (rsc->mii_revision == 3) {
>               /* RTL8211C(L) */
>               ssr = PHY_READ(sc, RGEPHY_MII_SSR);
>               if ((ssr & RGEPHY_SSR_ALDPS) != 0) {
>                       ssr &= ~RGEPHY_SSR_ALDPS;
>                       PHY_WRITE(sc, RGEPHY_MII_SSR, ssr);
>               }
>  -    }
>  -#if 0
>  -    else {
>  +    } else {
>               PHY_WRITE(sc, 0x1F, 0x0001);
>               PHY_WRITE(sc, 0x09, 0x273a);
>               PHY_WRITE(sc, 0x0e, 0x7bfb);
>  @@ -629,9 +632,5 @@
>       /* NWay enable and Restart NWay */
>       PHY_WRITE(sc, RGEPHY_MII_BMCR,
>           RGEPHY_BMCR_RESET | RGEPHY_BMCR_AUTOEN | RGEPHY_BMCR_STARTNEG);
>  -#endif
>   
>  -    mii_phy_reset(sc);
>  -    DELAY(1000);
>  -    rgephy_load_dspcode(sc);
>   }
>  


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