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Re: about Makefile

Subject: Re: about Makefile
From: "Mockey Chen" <mockey.chen@xxxxxxxxxx>
Date: Sun, 13 Nov 2005 22:43:43 +0800
Newsgroups: gnu.gcc.help
I assume the GNU make was used.

1.  = vs. :=
= assign the right value deferred.
For example:
x = foo
y = $(x)
x = bar

here `y' not equal foo, the y refer to `bar'

:= assing the right value immediate.
x := foo
y := $(x)
x := bar

here y refer to `foo'

If you not assure, always use the :=.

2.  use GNU make function, e.g.
$(shell uname -r)


"winnie" <zy.zhangyue@xxxxxxxxx> 
wrote:1131169108.054473.164570@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
> Hi all,when we declare a macro in a Makefile,say CC,we can do like
> this:
> CC = gcc
> Also we can do like this:
> CC := gcc
> so what's the difference between = and := ?
> And when we refer to it,we can write $(CC) or ${CC},so is there some
> difference between () and {}?
> another question,how can i refer to a shell command's results?say,if we
> execute command uname -r in a shell,we can get the version of the
> kernel,say 2.4.20.so if i want to refer to this version in
> Makefile,what i can do?i tried $(uname -r) and it didnt work.
>
> i will appreciate ur any help,thanks a lot!
> 



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