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On Thu, 2009-03-26 at 04:35 -0400, Paolo Bonzini wrote:
> This is also easy. ARM already has cbranch and cstore patterns, but they are
> not hard to merge with the new code derived from bCC and sCC expanders.
>
> Tested with these options: -mthumb/-march=armv5t -mthumb/-march=armv6t2
> -march=armv5 at all optimization levels.
>
> Paolo
>
> 2009-03-14 Paolo Bonzini <bonzini@xxxxxxx>
>
> * config/arm/arm.c (arm_compare_op0, arm_compare_op1): Delete.
> * config/arm/arm.h (arm_compare_op0, arm_compare_op1): Delete.
> * config/arm/predicates.md (arm_comparison_operator): Only include
> floating-point operators if there is a hardware floating-point unit.
> * config/arm/arm.md (cbranchsi4, cstoresi4): Enable for TARGET_32BIT,
> deferring to cbranch_cc and cstore_cc respectively.
> (cbranchsf4, cbranchdf4, cbranchdi4, cstoresf4, cstoredf4, cstoredi4):
> New.
> (cbranch_cc, cstore_cc): New.
> (movsicc, movsfcc, movdfcc): Do not use arm_compare_op0 and
> arm_compare_op1.
> (bCC, sCC, cmpsi, cmpsf, cmpdf, cmpdi): Delete.
>
This looks OK to me, apart from:
> -;; True for comparisons other than LTGT or UNEQ.
> +;; True for integer comparisons and, if FP is active, for comparisons
> +;; other than LTGT or UNEQ.
> (define_special_predicate "arm_comparison_operator"
> - (match_code
> "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu,unordered,ordered,unlt,unle,unge,ungt"))
> + (ior (match_code "eq,ne,le,lt,ge,gt,geu,gtu,leu,ltu")
> + (and (match_test "TARGET_32BIT && TARGET_HARD_FLOAT
> + && (TARGET_FPA || TARGET_VFP)")
> + (match_code "unordered,ordered,unlt,unle,unge,ungt"))))
Shouldn't that test also include TARGET_MAVERICK?
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